1. Field of the Invention
The present invention relates to a process for programming and reprogramming any reprogrammable onboard memory in parallel through a multiple access bus such as a bus operating using the CAN (Controller Area Network) protocol, and particularly to program and reprogram onboard flash type memories in parallel.
2. Description of Related Art
The following description is made with reference to a flash type memory, although the concept of the invention can be generalized to any reprogrammable memory.
Note also that the entire description given below is made particularly with reference to the use of a CAN bus. However, the concept of the invention also includes parallel programming/reprogramming of flash memories onboard modules through any other bus with multiple accesses not dedicated to this purpose and that could be used as a substitute for the CAN.
Flash memories are EEPROM memories, where EEPROM is an abbreviation for Electrically Erasable Programmable Read-Only Memory, with a very short write time, a low erase voltage and with high capacity, and are frequently used in microcontroller circuits, particularly circuits dedicated to communication management for different diagnostic tools for an automobile vehicle such as engine control, ABS, electronic suspension management, etc.
The problem that then arises is to program (or reprogram) the onboard memory of these dedicated circuits in a minimum amount of time therefore at low cost.
FIG. 1 shows a conventional functional diagram of a module of the type mentioned above with an on-board flash memory. The core of the circuit is composed of a microprocessor 1. The microprocessor 1 communicates with a system unit in a central computer through an asynchronous serial link 2 of the UART type, where UART is an abbreviation for Universal Asynchronous Receiver-Transmitter. An asynchronous transmission interface 3 is then installed between the microprocessor 1 and the transmission line 2 to enable transmission of data in asynchronous mode. A CAN bus can also be provided to communicate with the microprocessor through a CAN interface 7. The circuit also comprises a chronometer 4 connected to an external oscillator 8 to determine the frequency at which the system runs, and an erasable reprogrammable flash type memory 5. The flash memory is usually shared between a test area 5a and a user area 5b. 
In a context in which the flash memories to be programmed are blank, it is important to be able to start the activity of the microprocessor regardless of the frequency conditions under which the system is running and regardless of the transmission speed.
In prior art, the start methodology used to activate the memory is based on the principle of a separation of the flash memory into two parts: the flash test part 5a and the user flash part 5b. Thus, the flash test is programmed in the factory with a minimum program which then loads code through the UART serial link.
However, nowadays the UART serial link reduces the transmission speed which is limited to 9600 bits/s. Therefore this physical interface is not suitable for fast data transfers.
A faster physical link is necessary to enable greater productivity gains on production lines.
Thus, UART type serial links are increasingly being replaced by another communication medium which is the CAN bus, reference 6 in FIG. 1 and which communicates with the microprocessor in this circuit through the CAN interface module 7.
A bus operating according to the CAN protocol can achieve much greater throughputs than are possible with a conventional asynchronous serial link since the different throughputs possible with a CAN bus vary from 125 kilobits/second to 1 Megabit/second, and there is an intermediate rate of 500 kilobits/second.
The problem that then arises is to be able to program blank flash memories using this communication medium and therefore being able to download program code directly through the CAN bus and being able to execute it regardless of the system frequency conditions and regardless of the binary throughput on the link.
Solutions have already been proposed in prior art, particularly the ATMEL company has developed a microcontroller specifically dedicated to applications using a CAN network. However, the solution developed by ATMEL is not completely satisfactory since it requires additional hardware resources, particularly in the CAN module, for error management.
On the contrary, the invention is intended to avoid this disadvantage by implementing additional hardware resources.
It is important to note straight away that the invention is intended to be applicable to a context in which flash memories in all modules to be programmed are blank, in the same way as a context in which the flash memories are not blank, in other words a context in which an identical program is already installed in all modules, and this is the case particularly when a first programming of a test software has been installed in the flash memory and the flash memory then needs to be reprogrammed.
However, in a flash memory reprogramming context, in other words in the context in which an identical program of a test software had already been installed in the flash memory in all the modules, it is necessary to include an erase step before the flash memories can be reprogrammed as required by the user.
The erase step prior to reprogramming takes a lot of time, since it can take about 10 seconds per circuit. This memory erase operation is essential before reprogramming later, and is a severe handicap in a production environment that must produce several hundred of thousands or millions of modules.
Finally, concerning the actual programming of the flash memories in itself, another constraint that has to be taken into account is intrinsic to the component, since programming a flash memory is equivalent to charging capacitors. A flash memory is composed of several small capacitors each provided with a very good quality insulator, such that they hardly discharge over time.
However, the capacitors will discharge more or less quickly depending on the variation of the oxide quality in manufacturing batches. Thus, if the programming of a flash takes x microseconds for a given circuit, it may for example take 1 microsecond longer for another circuit due to variations in the oxide quality.
These synchronization problems that arise between the different modules due to programming of the flash memory and that are intrinsic to the flash memories themselves, are defects that make implementation of a specific programming protocol through the CAN bus unacceptable.